1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device. More particularly, the present invention relates to an LCD device and a driving method thereof that reduce power consumption.
2. Discussion of the Related Art
Flat panel display (FPD) devices are applied to various electronic devices such as portable phones, tablet personal computers (PCs), notebook computers, etc. The FPD devices include liquid crystal display (LCD) devices, plasma display panels (PDPs), organic light-emitting display devices, etc. Recently, electrophoretic display (EPD) devices are widely used as the FPD devices.
In the FPD devices, the LCD devices can be applied to all electronic devices ranging from small devices to large devices. Thus, LCDs are being widely used. A liquid crystal injected into an LCD device is driven according to a voltage difference between a data voltage supplied to a pixel electrode and a common voltage supplied to a common electrode to change a light transmittance, thereby enabling an image to be displayed.
FIG. 1 is an exemplary diagram illustrating a consumption power use state in a general LCD device.
Power used in the general LCD device, as illustrated in FIG. 1, is generated by a power supply 50, which generates the power by using input power (Rogic Power) input from an external system.
As illustrated in FIG. 1, 38% of the total power generated by the power supply 50 is used by a timing controller and the other integrated circuits (ICs), about 3% of the total power is used by a gate driving IC, and the other 59% power is used by a source driving IC (Source D-IC), a gamma block, and a common voltage block (Vcom block).
Here, the timing controller and the other ICs are referred to as a digital part, and the source driving IC, the gamma block, the common voltage block, the gate driving IC are referred to as an analog part.
As seen in FIG. 1, in a related art LCD device, the source driving IC consumes far more power than the other elements. Therefore, when power consumed by the source driving IC is reduced, the whole power consumption of the related art LCD device is reduced.
The reason that power consumption of the source diving IC is high is because a driving voltage VDD having a constant level is applied to the source driving IC.
For example, the source driving IC receives the driving voltage VDD to generate a gamma reference voltage suitable for an output image, and generates a data voltage by using the gamma reference voltage to output the data voltage to a data line. The driving voltage VDD of the related art always maintains a constant value.
Therefore, even though the driving voltage VDD is not fully used, since the driving voltage VDD always maintains a constant value, power is unnecessarily consumed in terms of whole power consumption of the related art LCD device.
To provide an additional description, in the related art LCD device, the driving voltage VDD which is applied to the source driving IC for generating the gamma reference voltage always maintains a constant level. That is, even when only the gamma reference voltage having a low level is used by an analog-to-digital converter (DAC Block) of the source driving IC, the driving voltage VDD having an undesired high level is continuously applied to the DAC. For this reason, power is wasted.
FIG. 2 are diagrams describing a method of generating a driving voltage in the power supply applied to the related art LCD device.
A driving voltage generator of the related art power supply for generating the driving voltage VDD is generally configured with a DC-DC converter. The DC-DC converter is configured as illustrated in FIG. 2(a).
A transistor T of the power supply controls charging and discharging of an inductor to generate the driving voltage VDD.
In a normal state, charging energy of the inductor is the same as discharging energy of the inductor. That is, an inductor current IL in a turn-on section of the transistor is the same as an inductor current IL in a turn-off section of the transistor.
In the normal state, when in a continuous mode, referring to FIG. 2B, “Vin*D+(Vin−Vout)*(1−D)=0” is calculated by substituting “IL_Ton+IL_Toff=0”, “Vin*Ton/L+(Vin−Vout)*Toff/L=0”, “Vin*Ton+(Vin−Vout)*Toff=0”, “Ton=DT”, and “Toff=(1−D)T”. As a result, Vout/Vin=1/1−D is obtained.
In an abnormal state, referring to FIG. 2(c), when charging energy of inductor>discharging energy of inductor, the driving voltage VDD (Vout) increase, and when charging energy of inductor<discharging energy of inductor, the driving voltage VDD (Vout) is dropped.
That is, the charging energy of the inductor is varied with the turn-on time and turn-off time of the transistor, causing a change in the driving voltage.
In the power supply 50, in order to control charging and discharging of the inductor, a frequency of a transistor switching signal (FET Switching Signal) input to the transistor T may be determined by a resistor R connected to the transistor T. FIG. 3 is a graph showing a relationship between the resistor R and the frequency of the transistor switching signal input to the transistor T. As seen in FIG. 3, the higher the resistance of the resistor R, the lower the frequency of the transistor switching signal.
In the related art LCD device, the frequency of the transistor switching signal is fixed irrespective of kinds of images. Therefore, the same frequency is used in a normal pattern, in which an output current (consumption power) is low like white, or a special pattern in which the output current is very high, for example, in a Z-inversion system using a 1By1 pattern. For this reason, an efficiency of the driving voltage generator (VDD Boost Logic) is reduced in the normal pattern, causing an adverse effect to power consumption.
In the related art LCD device, as shown in FIG. 4, a frequency of the driving voltage generator is set according to a characteristic of the special pattern such that a normal image is output even in the special pattern in which the output current is very high, power is wasted in the normal pattern in which the output current is low, causing a reduction in an efficiency of the driving voltage generator.
For example, in FIG. 4, when a panel outputs the special pattern in which the output current is very high, the driving voltage generator outputs a current of about 0.2 A or more, in which case it can be seen that the efficiency of the driving voltage generator is about 90%. Even when the current of 0.2 A or more flows, the efficiency of the driving voltage generator is about 90%.
However, the related art LCD device does not output only the special pattern, and outputs even the normal pattern which is normally output with a low current. When the normal pattern is output, as shown in FIG. 4, it can be seen that the efficiency of the driving voltage generator is rapidly reduced.
In the related art LCD device, a level of the driving voltage VDD is set to a constant level so as to effectively respond to the special pattern. To this end, the frequency of the transistor switching signal input to the transistor T for controlling the level of the driving voltage is fixed. The frequency of the transistor switching signal is fixed because the transistor T is connected to the resistor R having a fixed resistance. As described above, since the driving voltage generator outputs only the driving voltage VDD having a constant level, power is unnecessarily wasted even in the normal pattern requiring low power, causing a reduction in the efficiency of the driving voltage generator.